First, TSMC's Senior Vice President and CFO, Ms. Lora Ho, will summarize our operations in the third quarter of 2017, followed by our guidance for the fourth quarter of 2017 and her key messages. Afterwards, TSMC's two Presidents and Co-CEOs, Dr. Mark Liu and Dr. C. C. Wei, will jointly provide our key messages.

And then we will open both the floor and the line for the question-and-answer session. For those participants on the call, if you do not yet have a copy of the press release, you may download it from TSMC's website at www.tsmc.com. Please also download the summary slides in relation to today's earnings conference presentation.

As usual, I like to remind everybody that today's discussions may contain forward-looking statements that are subject to significant risk and uncertainties, which could cause actual results to differ materially from those contained in the forward-looking statements. Please refer to the Safe Harbor notice that appears in our press release.

And now, I'd like to turn the podium to TSMC's CFO, Ms. Lora Ho, for the summary of operations and the current quarter guidance..

Thank you, Jeff. Good afternoon, everyone. Thank you for joining us this afternoon. My presentation, as usual, will start with financial highlights for the third quarter and followed by the guidance for the fourth quarter. Third quarter revenue increased 17.9% sequentially to TWD252 billion.

The strength of our third quarter revenue was driven mainly by major mobile product launches and a healthy demand environment, including cryptocurrency mining. However, this strength was partially dampened by our customers' continued inventory management.

Gross margin declined 0.9 percentage point sequentially to 49.9%, mainly reflecting the 10-nanometer margin dilution, as I reported three months ago, but was somewhat balanced by an improved capacity utilization. Total operating expenses increased by TWD2.2 billion. The increase was mainly for 5-nanometer development.

However, thanks to operating leverages, total operating expense only represented 10.9% of revenue, so we were able to keep our operating margin flat sequentially at 38.9%.

On tax expense, after a big jump in tax rate to 23% in the second quarter due to the accrual of retained earning tax, our effective tax rate fell back to 10.6% in the third quarter. Full year tax rate will remain between 13% and 14%. Overall, our third quarter EPS was $3.47 and ROE was 25.9%.

Now, let's take a look at wafer revenue contribution by application. During the third quarter, all four applications saw sequential growth. Communication, Computer, Consumer and Industrial/Standard increased 10%, 46%, 15% and 13% respectively. Now, let's look at revenue by technology.

10-nanometer process technology contributed 10% of total wafer revenue during the third quarter, up from only 1% in the second quarter. The combined revenue from 16 and 20-nanometer accounted for 24% and 28-nanometer was 23%.

Advanced technologies, defined as 28-nanometer and more advanced, accounted for 57% of total wafer revenue, up from 54% in the second quarter. Moving on to the balance sheet, cash and marketable securities decreased, TWD157 billion to TWD502 billion, mainly as we distributed 182 billion of cash dividend and repaid 28 billion of corporate bonds.

Correspondingly, current liability decreased by TWD225 billion. On financial ratios, accounts receivable turnover days decreased five days to 42 days, while days of inventory slightly increased one day to 53 days. Now, let me make a few comments on cash flow and CapEx.

During the third quarter, we generated about 117 billion cash from operations and spent TWD 62 billion in capital expenditures. As a result, free cash flow was an inflow of TWD 55 billion. After we paid out cash dividend and repaid corporate bonds, cash balance decreased by about TWD 162 billion to reach TWD 408 billion at the end of the quarter.

In U.S. dollar terms, our third quarter capital expenditure was about USD 2.1 billion. Now, let's turn to the fourth quarter guidance. Based on current business outlook, we expect fourth quarter revenue to be between USD 9.1 billion and USD 9.2 billion, representing 10% Q-over-Q growth.

Based on exchange rate assumption of USD 1 to TWD 30.30, our fourth quarter gross margin is expected to be between 48% and 50%. Our fourth quarter operating margin is expected to be between 37% and 39%. As we highlighted 3 months ago, we expect that 10-nanometer ramp will impact our second half 2017 gross margin by about 2 to 3 percentage point.

In the third quarter, the 10-nanometer dilution was about 2 percentage point. We expect the dilution to be about 3 percentage point in the fourth quarter as the significant ramp-up of our 10-nanometer production will continue. Now, let me make some comments on our CapEx.

On CapEx, we have spent USD 8.8 billion so far through the first 3 quarters of 2017. We now expect our 2017 budget to be USD 10.8 billion, up from previously guided USD 10 billion. The increase of about USD 800 million is mainly attributable to the accelerated buildup of 7-nanometer capacity.

In order to support our 5% to 10% revenue growth target in the next few years, we anticipate that our CapEx in the next few years may be a few percentage points more than USD 10 billion. Let me make some comment on profitability. Over the past few years, we have been able to improve our structural profitability.

We plan to maintain our structural profitability by continuing to create more value for our customers, increasing operating efficiencies and maintaining high utilization rate with careful planning of capacity. This is a challenge as every year we face a different market environment.

However, with continuous innovations, our target is to maintain our gross margin at close to the 50% level. This is my remark. Now, I turn the microphone to Mark..

Good afternoon. I want to deliver the following messages; the title is showing on the screen. And the first is the near-term demand and inventory. Again, I will talk about demand in U.S. dollars because almost all our shipment is paid by U.S. dollar. We had a good third quarter.

We concluded our third quarter revenue with 18% quarter-to-quarter growth in U.S. dollar. This growth is strong, mainly driven by major mobile product launches using our 10-nanometer technology and InFO advanced packaging.

Even though demand was slightly dampened by the supply chain inventory reduction, our customers' third quarter growth were largely healthy. We saw continued strength from automotive, IoT and high-performance computing, which includes a surge demand from cryptocurrency mining.

As for fabless inventory, days of inventory stayed high exiting 2Q '17, largely due to the deferred annual product launch of Android smartphones, mainly from April -- from March-April to June-July. Moving into third quarter, we estimated fabless DOI continues to reduce, but still to be higher than seasonal.

We expect decreases to close to seasonal level exiting 4Q '17. For the fourth quarter, we now forecast to have another strong revenue growth of 10% quarter-to-quarter. It is driven by the ramp-up of our 10-nanometer technology. We forecast world semiconductor growth of 16% year-to-year in 2017. In it, memory segment will grow 51% we estimate.

The world semiconductor, excluding memory growth, is about 6% year-to-year. It is mainly supported by the increased silicon content and a richer product mix, especially in the high-end smartphone, AI and automotive related market. For the foundry market, we forecast revenue growth to be 7% in 2017.

It is an increase from our previously 6% forecast last quarter. For TSMC, we forecast to have a revenue growth of 8.8% in U.S. dollar, near the high-end of 5% to 10% target of 2017. Now, I will talk about some major projects that are still in R&D. Later C. C. will talk about projects that are either in production or in near to production.

For the project in R&D, first I will talk about N5 progress. TSMC N5 technology is scheduled for first half 2019 risk production and 2020 volume production. Its development progress is well on track. Development of both device performance and yield improvement are on schedule.

Our N5 technology will provide the best power efficiency for mobile application in 2020. This N5 technology will also support high-speed standard cells featuring extreme low Vt transistor, low RC interconnect, high-density capacitor and high-performance computing interconnect design scheme.

Those features are designed for applications in server, CPU, GPU, network processor and FPGA. TSMC N5 will use EUV extensively to get the full benefit of EUV. I'll talk more about EUV readiness. Our EUV technology development are progressing well for N7+ and N5 technologies.

We have consistently produced equal or better yield on our N7 baseline using several EUV layers. The world's first NXE:3400 EUV scanner has been released to production in our fab and has produced the best CD control, overlay and SRAM yield on our N5 technology.

We have run over 1,000 backend yield trial lots of N5 with EUV and its yield is better than N7 at the same stage of our development.

At TSMC, our EUV infrastructure development on high sensitivity EUV photoresist, low defect mask blank, package quality and method of mask defect inspection are all on track for 2019 N7+ volume production and 2020 N5 volume production. The following, I will provide our outlook of smartphone and high-performance computing. Firstly, on smartphone.

We forecast world smartphone long-term unit growth to be 6% compound annual growth rate from 2016 to 2021. On top of this unit growth, the insatiable need for higher display quality and camera performance on new smartphones will continue.

New advanced technologies such as voice recognition, on-device AI, AR, VR, 4G to 5G, et cetera, are driving silicon content for smartphone to continue to increase. We also see those high-end features continuously proliferate to mid, low-end smartphones.

On HPC, high-performance computing, we continue to believe AI and ubiquitous computing will be important drivers for long-term world semiconductor growth. The fast expansion of deep learning in data centers is driving performance requirement for our GPU, CPU, FPGA and ASIC customers.

Meanwhile, AI will continue to proliferate from the cloud to broad based client devices such as smartphones and ADAS in cars, DTVs, set-top box, gaming, surveillance, robot and drone. Already started from voice AI, future AI will be much more sophisticated and intelligent, capable of real-time complex inferencing and local learning.

All this requires intensive localized parallel computation. In addition to AI, the emerging blockchain applications seen in cryptocurrency mining recently may also fuel the future growth of high-performance computing. So we are more optimistic on the high-performance computing opportunity today versus last year.

With our advanced wafer processing technologies and advanced packaging technologies, we will enable our customers to capture this trend. High performance computing wafer 10 in 2017 is about $11.5 billion and we expect it to have a double-digit CAGR, compound annual growth rate, in the next five years.

We expect high-performance computing will become our major growth engine starting 2020. That is my message. Thank for attention. So I turn the microphone to C. C..

Thank you, Mark. Good afternoon, ladies and gentlemen. Let me start with our outlook for IoT and automotive. IoT will be one of the high core segment for TSMC in the next five years, with expected annual growth rate better than 20%. In 2017, we estimate the business contribution from IoT will be more than USD1 billion.

We believe the course of IoT market is mainly driven by the readiness of ubiquitous connectivity such as Wi-Fi, Bluetooth, narrow band and 5G. TSMC has been working with customers to develop technologies required for IoT products such as sensors and various mainly low power devices.

In sensor technology, we have offered the foundries a first step to CMOS image sensors process down to 14-nanometer. We have also offered the first NIR product and the smallest of footprint main sensor, which has been widely used in smartphones and other applications.

In low power, TSMC has developed a comprehensive and complete set of low power technologies to meet our IoT customers' requirements. In this category, our technology currently include 55-nanometer ULP, 40ULP, 22ULP and 12FFC. Now, let me move to automotive.

In the automotive industry, we believe there are 3 mega trends that will lead to higher semiconductor content in future vehicles.

They are the trend toward better safety such as ADAS; the trend towards smart vehicles, which is demonstrated in faster and wider connectivity and infotainment; and the trend toward greener vehicles such as electrical vehicle and the hybrid electrical vehicles.

TSMC has developed advanced CMOS technologies with a complete automotive IC design ecosystem both in 16FFC and by next year N7. We are also working with all top 5 auto MCU companies to develop multiple embedded flash technologies for applications in many areas such as engine control, breaking system, infotainment and et cetera.

TSMC's superior auto [break] manufacturing quality, sufficient capacity and long-term supply commitment are additional critical elements to fulfill the automotive supply chain requirement. We expect to double our automotive business in the next 5 years from about TWD 1.4 billion this year. Now, let me move to N7 and N7+.

N7 been transferred from R&D to manufacturing in early third quarter this year. Right now, our efforts focus on defect reduction and fine-tuning device performance to prepare for mass production in the first half of 2018. We expect the yield learning in N7 to benefit greatly from N10 and our progress so far has been on schedule.

The initial application for N7 are high-end application processors and high-performance computing. We are working with major customers for their products to be introduced in 2018. We expect more than 50 tape-outs by the end of 2018. We will also introduce N7+ in risk production in 2018.

Compared to N7, N7+ will have 20% area reduction and larger density and about 10% speed improvement. We will start to use EUV in production at N7+ node. We have been working with ASML in developing EUV process for many years.

Right now, as Mark just mentioned, we are using our own N7 test vehicle to practice EUV and have achieved same yield in SRAM circuit as without EUV. Now N10, TSMC N10 offers two times logic density and 15% speed improvement as compared to our 16FFC. We are already in mass production with the major application in the high-end smartphones.

The N10 yield has been better than our original plan and N10 has also set a new record in TSMC history in terms of ramping rate. We have achieved the planned peak output in a period less than two months as compared to three months for N20 and the N16.

The cycle time is also better than planned and again sets another new record for ramping up a new technology. We expect N10 to contribute about 10% of our full year 2017 wafer revenue. Now, N16 and N12.

This year we have introduced 12FFC technology to further improve upon our 16FFC with a faster speed by about 6% to 10% or reduction of power consumption by about 15% to 20%. In addition, 12FFC also has about a 20% smaller logic area as compared to 16FFC.

As a result, we expect most of our customers will start to adopt 12FFC for their products in 2018 and after. The major application for this 16, 12FFC node are mobile applications processors, graphics chips, FPGA, RF and low power devices.

Due to strong demand from the high-performance segment, we have reached a very high utilization rate in 16-nanometer recently and we expect this momentum will continue into 2018. Let me now comment on 28-nanometer.

As we reported in our last Investor Conference, our 22-nanometer will offer a 10% chip area direct shrink and 13.5% speed improvement or 25% power reduction as compared to 28HPC+. This technology is suitable for applications such as image signal processor, 5G millimeter-wave transceiver, low cost application process and others.

Through continuous technology improvement, we are confident that TSMC's 28, 22-nanometer node will remain very competitive in the market. In 2017, we have observed the highest number of new tape-outs in 28-nanometer as compared to previous years.

After six years of high volume production and millions of 12-inch wafer shipped, we have achieved the lowest defect density and very competitive cost structure for 28-nanometer. We believe we are very well positioned to continue to maintain our high market segment share at this node. Thank you for your attention..

Okay, thank you. This concludes our prepared statements. Before we begin the Q&A session, I would like to remind everybody to limit your questions to two at a time to allow all participants an opportunity to ask questions. Questions will be taken from both the floor and from the call.

Should you wish to raise your questions in Chinese, I will translate it to English before our management answers your question. [Operator Instructions] Now, let's begin the Q&A session..

Our first question comes from the floor, Deutsche Bank's Michael Chou..

C. C., you mentioned 7-nanometer tape-out number more than 50 by year end.

So are half of that for HPC?.

How many of 50 tape-outs are for HPC?.

Yes..

Probably more than half. More than half..

So does that mean that the progress for HPC is stronger than your observation 6 months ago? Because in the past you say it should be more than half tape-out for HPC for your [indiscernible] tape-out three months ago, right. So the pattern is the same or --.

Did we say that 6 months ago?.

Three months ago you mentioned that..

Well, we talk about last time also about 50 -- more than 50% HPC tape-outs. But that doesn't mean the volume is more than 50%, because many of the high-performance computing in FPGA and in other ASICs there are smaller volumes. It's just the activity -- it's showing the design activity is pretty strong.

But I think the performance -- the volume isn't proportional to the tape-out numbers..

One follow-up question for 7 -- do you think AI will use 7-nanmoeter in 2018 or 2019, AI product?.

Tape-outs? I don't want to comment on customer products' schedule..

Second question is regarding your 28-nanometer market share next year.

So what is your view for your 28-nanometer market share in 2018-'19?.

28-nonmeter?.

Yes, comparing your 20-nanomter?.

We will maintain our high market share..

Let's move on to the next question also from the floor, Credit Suisse's Randy Abrams please..

I want to first congratulate you on the 30 years and also your appointments.

The first question, back to the data center, as you look at pricing that node because you're targeting higher performance applications, is there a potential you could have different pricing or better pricing and better profitability rather than the -- or relative to the mobile tier? And just a second small part, the cryptocurrency you mentioned as a long-term driver, but I'm curious in the short-term if you're seeing sustainability of that strength over the next couple of quarters?.

First of all, the high-performance computing definitely have potential if we provide high values, but so far we work with our customer. They are in the entry stage. We don't see much differences. As for second question...

The crypto….

Cryptocurrency, okay. As you know, the cryptocurrency price is very volatile but in the recent year it has been quite tenacity, keeping at high level. Even with some of the government, because of the monitor issues, they have some constraints. But it doesn't seems to be a roadblock at this point.

But we look at the cryptocurrency as a initial application for the blockchains. And as you know, the service company today they offer many blockchain application platforms. So it's the technology that is very interesting and it will transform many of the contracts or payment methodology today. So that's the reason.

I would not comment on the cryptocurrency sustainability, but we don't see it drop either..

This second question, back to the profitability, where 10-nanometer ramping is about 300 basis point impact in fourth quarter. If you could talk next year, I think two questions.

In first half if mix shifts back, could it be like we saw this year first half where gross margins went to, say, 52%, but saw some improvement in the first half? And then if you could talk about the view next year, how much dilution from 10 and if you expect 7 to have a certain amount of dilution?.

The 10-nanomter dilution, it's highest this year, so we are ramping very, very fast. So the dilution will reduce to about 1 percentage point next year and there will be no dilution after 2018. So for 7-nanomter, we believe it will follow the similar trend.

Actually, probably I said a couple of times it takes eight quarters seven to eight quarters for any particular new node to dilute corporate margin, but after eight quarters will be similar to corporate level. So 7-nanometer will be at the same trend..

And I guess if you think the seasonality of margin, if, say, mix shift is back -- you also have seasonality in first half, but could we see the same scenario where margin, say, starts being higher in first half?.

Yes. I think margin has several factors. Number one is structure profitability. I just made my remark and we are working very hard to maintain close to 50% level. Another factor of course, as you just mentioned, there is a seasonality and that affects utilization.

And we'll have to look at the demand on the next year to decide whether the profitability will be different for now..

Let's move on to the next question, Citigroup's Roland Shu..

Good afternoon. For your 10-nanometer to reach 10% of your total revenue this year, that means 4Q 10-nanometer probably will be about 25% of your total revenue.

So with this high contribution for 10-nanometer in 4Q, are you worrying for first quarter next year -- that will be -- revenue will be sub-seasonal once our major customer finishes their shipment in 4Q?.

Your calculation is quite close to the number that we have. As for next year, actually we did not comment, but there's a seasonality on the smartphone market. So we are -- probably we will follow that seasonality as you just mentioned about. And the impact, don't know yet.

But we -- our customer are working on migration to the next node that we're ramping up in the second half of next year..

Second question is now -- Mark, also talked about there are more and more smartphone application process integrating, these newer engine for machine learning or AI on the smartphone.

So going forward, will you improve this smartphone application process, so with AI function into HPC set?.

No, no. We still capitalize whatever happen inside smartphone, yes..

So with this fast AI adoption for the smartphone, will it change your earning contribution forecast for smartphone and/or HPC? Previously you talked about from 2016 to 2020 TSMC revenue will grow about 5% to 10%. Out of this 5% to 10%, 50% will come from smartphone and 25% from HPC.

Now, with this fast AI adoption on smartphone, will it change your view on that?.

We forecast at the -- AI I think two years ago, yes. So we have been observing this market very early on, and with time, we always incorporate into our forecast already. Today I just raised a issue that this year's outlook appears to be better than last year's. One of you asked me this question, yes..

Okay, understood.

For this HP -- or for this application processors for AI and smartphone, is InFO a must to package this kind of the chip?.

I cannot comment whether InFO is a must, but InFO definitely improve the performance and enhance the competitiveness of that device in the market..

All right. Let's take the next question from the floor, UBS' Bill Lu..

Hi there, thank you very much for taking my question. And also, Dr. Liu and Dr. Wei, congrats on the new appointment. First question is for Dr. Liu. You talked about a wafer TAM opportunity for HPC of 11.5 billion. Can you talk about how that is defined? And also, I've spoken to a few of your customers recently.

It sounds like machine learning and parallel compute, high bandwidth memory and putting that all together in very close is going to be pretty key. Can you give us an update on your outlook on CoWoS? Thank you..

Our definition of high-performance computing, including the CPU, GPU, FPGA, gaming and some ASIC processors, we call XPU, they are different company produced processor units, and that's the definition..

Sorry, wafer TAM meaning….

Wafer TAM meaning, if those parts being produced by foundry what will be the foundry value for that market..

And the part two of the first question is on CoWos..

Yes, we are truly excited about our CoWos and the growth seems higher than we earlier forecasted. It is essential for the chip-to-chip, bringing the chip closer, be it memory or other communication chips. And I think year-to-year growth if not double, it will be close..

Can you give us an outlook on what that might look like next year and also what kind of CapEx is required for CoWos?.

As just Mark said, CoWos, although it's small now, but it's growth momentum is pretty high. We expect very strong growth on CoWos business next year. In terms of the CapEx expenditure, I think in the recent few years as InFO still accounts for a majority part of the beginning investment, CoWos is not high..

safety, smarter cars and greener cars. If you look at specifically on the greener cars, right, the EVs, power management, it seems like a lot of these are more niche applications. People are talking about silicon carbide. I think a lot of it is going to be truly edge.

What's your plan for addressing the EV market?.

Well, I think the EV market is -- there's a lot of electronics component inside. The first -- top of my mind is power management, right? You have a huge amount of battery. You need the power management to make sure that everything is coordinated and deliver the power out.

And then you have a lot of control as compared with previous -- our concept inside a car, engine, control, infotainment to receive the Wi-Fi connectivity. So in the EV's field, I would think that semiconductors' content will greatly increase, because you need a lot of connectivity.

You need a lot of computation also because you correct your environmental information and you need a lot of high-speed computing to make a decision, go, no-go, turn right or something like that. So a lot of applications. Probably, today we still underestimate this market..

Maybe just specifically, would TMSC consider silicon carbide?.

We do something better than that..

Yes, we have a question from the line of Brett Simpson of Arete Research..

Can you perhaps talk a bit about the ASIC business at TSMC? I mean we're seeing significant ASIC activity, particularly system OEMs or hyperscalers, and I can see the global unit chip business is growing a lot.

So maybe if you can just help by talking broader about ASIC business? And I guess traditionally it has been Huawei or Cisco or Apple, but how big is this ASIC business for TSMC and how would you categorize the growth outlook for ASIC at TSM?.

Brett, please allow me to repeat your question. Basically, you want to ask about the outlook for the ASIC business at TSMC. You pointed out that many system OEMs and hyperscalers are designing ASICs. From your view, do you see us growing a lot.

So you want to understand how does the ASIC business outlook for TSMC look?.

That's right. Thank you..

Okay..

Yes, a lot of process unit already I mentioned is in the form of ASICs, because the computation ecosystem is no longer fixed into a one platform such as personal computer before. Each company have their own platform. Therefore, they tailor their chip design accordingly to get the maximum computation power.

We -- currently ASIC, we support our customers for those projects. Therefore, our direct customer will still be the design service company, some of the fabless ASICs and some of the regular fabless company that part of their business is designing -- using ASIC capability to expand their business.

So all this funnel into our loading, which we do not categorize as ASIC, but it is all forms of ASIC coming to our foundry services. And it is growing. I don't -- therefore, I don't have the specific number for you..

Okay, Brett, do you want -- do you have a follow-up?.

Just a follow-up..

Sure..

On 16-nanometer, you've reported 16-nanometer sales down year-on-year for the first time, down over 20% year-on-year. And I know you referenced a lot of growth in cryptocurrency which is using 16-nanometer.

Can you maybe just talk a bit about what has happened at 16-nanometer at TSMC? And when you look ahead -- I think you talked about the tape-out activity for 28 and 7-nanometer being very strong, but how would you categorize the 16 and 12 nanometer tape-out activity for TSMC going forward?.

Okay. Brett, please also let me just make sure that we understood your question right. So, Brett, you're saying that our 16-nanometer sales were down about 20% year-on-year in the third quarter, but we had also higher growth in cryptocurrencies. So you want us to talk about what has happened in 16-nanometer in the past.

And then we've also talked about that we have very strong tape-outs at 28 and 7-nanomete, but then how does the outlook for 16/12 look going forward.

Is that correct?.

Yes. Thank you. That's great..

Let me comment on the 16 FinFET first. 16 FinFET has been a very successful node for TSMC, but we continue to improve the performance with the introduction of 12FFC.

Now, recently I just reported that we have a very high utilization because of high-performance computing demand and we look forward into 2018; 16 and 12-nanometer node will continue this high utilization momentum for next year and probably going to the other year also, all right? So what is the other questions?.

Brett, does that answer your question?.

Yes, that's great. Thank you..

Okay, thank you. We will take the next question also from the line.

Operator, please?.

The next question comes from Mehdi Hosseini of SIG. Please ask your question..

A couple of follow-ups. Regarding your CapEx statement, how much of the next year CapEx are you going to attribute to new facility because I'm on the impression that you're going to build a new fab for 3-nanometer application and it will be great if we could get a color on the mix of CapEx for next year? And I have a follow-up..

Okay, sorry, Mehdi. Let me repeat your question to make sure we got it right. So your first question is, we talked about CapEx, how much of next year's CapEx is related to 3-nanometer.

Is that correct?.

And also the associated new facility construction..

So facilities associated with 3-nanometer. Okay..

No, no CapEx will be associate with 3-nanometer next year. It's still too far away from..

Right.

But will you keep building a new fab next year?.

I'm sorry, can you repeat that?.

Next year CapEx include construction of the new fab?.

Will next year's CapEx include construction of a new fab..

Yes, next year CapEx will include the construction for 5-nanometer and a little bit for 7-nanometer as well..

And I have a follow-up regarding the transition from the 7 to 7-nanometer plus. Assuming that the EUV insertion will happen at 7-nanometer plus, how will your customers will be planning for the mask set? I'm under the impression that 7-nanometer plus will require a new mask and layout.

And would EUV essentially cannibalize demand for 7-nanometer?.

Okay, Mehdi, let me repeat your question. Again, you're asking about the N7 to N7+ transition and the use of EUV at N7+. How does this impact or how will your customers impact the mask cuts and layout and will EUV cannibalize the demand for 7-nanometer. So two parts to your question..

All right, let me answer. Let me answer the N7 to N7+. Yes, we're going to use a few layer of EUV in N7+. And as a result, the chip area will be shrinked -- will be shrunk and the customer has to retape-out if they are using -- talking about the 7 product, they have to retape-out to get the benefit. That's for sure.

And is that going to penalize the N7? No. Because of a lot of design rule has been used thrice in the N7+ also. So in fact from N7 to N7+, we expect customer don't have to spend 100% of their resources again to design a new node. Actually, it's not..

Okay?.

Did I answer the question?.

Yes. Okay. Let's come back to the floor for further questions.

Morgan Stanley's Charlie Chan please?.

Thank you, so my first question is to follow-up previous question on foundry TAM. Do you include that x86 CPU in your foundry TAM? For example, Intel represent in-house, right, and they outsource to foundries.

So how do you count this x86 CPU in your foundry TAM?.

Charlie, you're asking about the HPC wafer TAM?.

Yes, yes..

Right..

Well, this is a little bit sensitive and there are only two customers doing x86. So I wouldn't want to comment on specific customers..

And my next question is regarding the major transition in your -- again, congrats for your new role. So my question is more general. What's going to be the key change in operation or strategy that both Co-CEOs want to make in the coming three years and also what's the challenge you can foresee with Dr.

Chang's guidance for the company?.

Well, yes, there's a challenge because of Dr. Morris Chang's achievement. You just cannot go better beyond that. For the philosophy, strategy, operation, I believe it will be continuous and I believe I will work with Mark for many years and we will cooperate each other for sure, no problem.

Mark?.

Well, next June will be the time, not yet today. And I think C. C. Wei has many strengths. He can be an excellent CEO. So the challenge will be not that big. And I will of course tune myself to serve up to my best to the new role of the Chairmanship and I should be able to deal with it. And the Chairman today is working closely with me and C. C.

and we are constantly working together how to go through this transition. So by June next year, I think the role will be already pretty much defined in place. So it will still take eight months for us to make this transition I think. But I'm confident that we can make that transition, yes..

We wish the transition will be very smooth. And my next question is to Lora on some financial numbers implication. So I would assume next year CapEx to be flat, right, because this year it's at TWD 10.8 billion.

Next year it's at a few percentage above TWD 10 billion, right? So given the CapEx is flat and you're targeting for like 5%, 10% return CAGR, is it fair to assume you already think your capital intensity will decline in coming years?.

I think I have said -- when I talk about this TWD 10 billion, I also said in the next few years I believe our capital intensity will be in the range of 30% to 35%. So right now the CapEx looks like it will be slightly higher than TWD 10 billion, but I still believe the capital intensity will still be in the range of 30% to 35%..

And also, on that margin guidance, right? So I guess people ask about gross margin for 7-nanometer versus 10, HPC versus other application. But how about the EBITDA margin you're making from 7-nanometer versus 10-nanometer? Because I think that for 10-nanometer I guess the yield rate ramp was a little bit slow early this year.

I would assume for 7-nanometer the yield rate ramp should be better and also you're converting some tools from 10-nanometer, right? So I just want to get a sense about the EBITDA margin level for 7 versus 10?.

I will talk about the corporate level EBITDA margin first. I think in the past few years, our corporate level EBITDA margin has been ranging from 60% to 65%. You can calculate by yourself. This number is going to maintain, as far as I can see, in the next few years.

In terms of who contribute that EBITDA margin, you're asking particularly about the 7-nanometer? Okay. I think you can understand the first few years for any new node the EBITDA margin should be negative. But after it reach to the mass production, it will ramp up very fast.

So for a period of the time it will be higher than corporate average EBITDA margin and then fall back to corporate level. So that's -- I think you can understand that. Similarly, Intel will also follow that trend..

Yeah, I think that will be the case, right, because your margin guidance is 50% and this quarter your guidance is 48% to 50%.

So lastly, if I may very quick? So one of your big smartphone customer their new chip is 30% smaller than previous die size, right? So I understand your comment about more smartphone semi contents, but your customer is also shrinking the die size, right? What does it mean to your wafer revenue for next generation -- for example, 7-nanometer?.

You are asking that my customers' product die size….

Yes, he is….

…is 30% smaller?.

Yes, so two trends, right? Semi contents per smartphone is growing, but your customers' die size are shrinking.

So what does it mean to the wafer demand for your smartphone business?.

First, I don't comment on my customers' die size, you know that. We build the capacity according to what the customers demand is. That is all I can say. And then the 10-nanometer for this year will contribute 10% of the total wafer revenue. That's it..

I think we need to move on. Next question from the floor, CLSA's Sebastian Hou..

So my first question is regarding the growth outlook for CPU with your high-performance computing segment.

Do you see -- or are you more confident in the ARM-based CPU or x86 CPU if we just look at next two years for your growth?.

Mostly ARM-based CPU what we are working on with our customers..

So you don't see x86 CPU to be a powerful driver for next two years?.

Then that is too specific to comment because that's only one customer..

And my second question is on the 7 nanometers and your 7-nanometer plus.

If you look at next two years together, do you have a sense or estimate regarding how much market share you have on this node 7 and 7+ together?.

Certainly, I myself hope that is as high as possible, but today I don't have a number to give to you. But we work with many, many customers, and as I said, at the end of 2018 we expect to have 50 tape-outs and it's a very -- kind of vigorous activities..

But what if we just compare that with the 16 nanometers share you have in 2015, would that be higher? I mean 7 would be higher than the 16-nanometer at that time?.

That will be too specific, no? I mean you're talking about a -- so I don't want to comment, but we are going to have very higher market share..

So just a follow-up on that.

7, 7+, is that -- do you see a major -- most of your customers will migrate to 7+ after using 7?.

I think after 7 we certainly will, with our customer, to migrate into 7+ if that is in their product roadmap, because of -- somehow the 7+ offer a 20% logic area, density improvement. But we're working with customers. But I cannot comment and say that everyone will go to the 7+..

Let's move on. We have -- let's take, Operator, the next question from the line as well please..

We have a question from Steven Pelayo of HSBC..

First question, just a clarification to your answer -- I think it was to Roland's question on 10-nanometer in the first quarter. Your response was you expect normal seasonality. The fourth quarter is actually quite a bit above historical seasonality.

So could you speak a little bit more on what happens to 10-nanometer in the first quarter? Does it still sustain the same dollar level? Help me understand the trend of 10-nanometer?.

So your first question, Steven, is about the 10-nanometer. You want to know in the first quarter of 2018 if the 10-nanometer revenue will sustain the same level..

I'll give you the guidance in the first quarter next year..

Okay, fair enough on that. And then maybe a little longer term question. Both kind of leading edge as well as mainstream, it seems there's a lot of Chinese capacity that's going up -- capacity in China that's going in with four or five different fabs that are going on.

I'm curious, what do you think about the competitive landscape with the Chinese supply? Do you think that presents a risk out there of excess supply at some point? That's I think more in the mainstream kind of.

And then it also seems like on the leading edge nodes, all three of your competitors, Intel, Samsung and Global Foundries, have made a lot of noise in the last 90 days or so trying to pitch their foundry offerings and claiming their execution has got better.

Any thoughts on leading edge competitive landscape?.

Okay, Steven, let me just repeat your question. It seems to be a long-term question on the competitive landscape, two parts. The first is to address the China capacity. You're saying that you're seeing many different -- much, sorry, capacity being added in China, four to five different fabs. So what does this mean for the competitive landscape.

Will this result in excess supply risk in the mainstream. This is the first part of your question. And then the second part is to address the competition at leading edge with Intel and Samsung and you're saying, you're talking about better execution, et cetera. How do we view the competition at leading edge.

So two parts to your question, correct?.

Fair enough. Yes..

Regarding to a lot of new fabs in Mainland, China and the question is whether that's...

Whether the additional capacity being built in China, what does this mean for the competitive landscape, will it result in excess supply risk at mainstream nodes..

We believe that if you build a fab, you should come with technology, and most important, with a customer. So a lot of fabs. Previously, we talk about effective capacity. That means you got to have a technology, you got to have a customer. So in terms of a lot of fabs in Mainland, China, we don't like it, but we are very competitive.

So we will continue to compete of course and maintain our market share..

Okay. And then the second part of Steven's question, competition at the leading edge with Intel and Samsung..

Well, in the leading edge, we always live with fierce competition in the past. In today's -- I think -- but those are foundries competitions. Now, these two -- IBM is getting into foundry business too, but one of our advantage is we do not compete with our customers and that plays a major role in us to earn the trust from our customers.

But we don't take any competition lightly. We will just compete with them..

Let's come back to the floor, first Goldman Sachs' Donald Lu..

[Foreign Language].

Okay, please allow me to translate Donald's question. First, he said congratulations to Dr. Lui and Dr. Wei on the smooth transition.

And then your first question is that you said our computing segment revenue showed -- displayed strong growth in the third quarter and you want to know how much of this is coming from the cryptocurrency segment, correct? Okay..

Well, in the third quarter, the cryptocurrency revenue is about USD 350 million to USD 400 million. So it's pretty big and it's a pick up from the third quarter and stay on for the fourth quarter..

Okay.

And the second part of your -- your second question, Donald Lu?.

[Foreign language].

Sorry. Please allow me to translate. Donald's follow-up is that if cryptocurrency gets bigger, will this result in exponential growth and also looking to 2018..

We -- of course our customer is always very bullish on their demand for the next year, but we count it cautiously. So we currently are trying to work out with the customer, anticipate possible volatility and -- but try to still support that. Hopefully, next year will be higher, but we do not count on that..

So do you have a second question?.

Yes, the second question is on the 28-nanometer. I think SMIC recently has hired a new CEO, which both of you probably are familiar with. And also there's a party -- and UMC also building capacity on 28. But I checked the 28-nanometer demand at least in the first half this year among -- and all the foundries increased about 10% only. And you said -- C.

C. said there's more tape-out activities.

But in terms of growth and demand and also in terms of supply, if those guys build-up capacity and build-up technology, do you think there will be a real price bloodbath next year?.

First, the technology, TSMC continue to improve the technology. Now, we improve on 28HPC+ to 22-nanometer now. So it's very competitive and our cost structure also very competitive. So we have all the weapon to defend our high market segment share in this node -- and we will.

Did that answer your question? Because -- do you want me to nail down that -- how many percentage?.

More -- for next year do you think 28-nanometer overall demand for all the foundries will increase, let's say, more than the first half of this year, which is 10%? And also for next year if they build capacity more than 10%, then could we have a real price problem?.

Well, I don't comment on competitors' build-up of their capacity. All we can do is -- we develop technology. We have the customer working with us. And we believe we maintain the market segment share. And the demand will increase.

Okay? Are you satisfied?.

Let's move on. I think we have one question from Gokul Hariharan from JP Morgan in the front..

So on 7-nanometer, Dr. Wei, first question is, it looks like there is a lot of -- a confluence of positive factors in terms of HPC coming in and I think there is a lot of AI-related demand also coming.

Could you take a initial stab at where you think 7-nanometer -- maybe 7 immersion and 7 -- N7 and N7+ combined could be in terms of revenue opportunity for the industry compared to, say, the last peak was 28-nanometer? That was my first question..

We believe N7, N7+ will be a long lasting node and that will be very useful for our customer to utilize that..

So could you comment a little bit more specifics in terms of is it going to be much bigger than 28? Because it looks like 16 is a little bit short….

We certainly hope they are much bigger than 28, 28 node, yes.

Second question. Dr. Liu, you mentioned about the AI demand starting to move from the datacenter to the edge in terms of devices, ADAS, et cetera.

Could you talk about how this evolution happens in terms of the foundry TAM itself, the wafer TAM for HPC? Do you feel in the next three to four years the wafer TAM from the edge could start surpassing -- the AI related wafer TAM could start surpassing the wafer TAM that you see in the datacenter? Or some kind of quantitative idea in terms of how you think that evolves?.

I cannot, I cannot. I think -- I raised that trend to show that AI will be a fast growth, because in the datacenter it is a closed ecosystem. Once it goes to the client edge, it's an open system. So innovators will come in easily, so has higher growth potential. I haven't calculate the -- how it will cross over. Maybe I should take a look, yes..

We have a question from Patrick Liao of Macquarie Securities. You may ask your question..

My question -- my first question is about the mobile phone silicon content per box in the next few years.

Can I have an idea about this?.

Let me repeat your question. Patrick, you want to know the mobile phone silicon content per box, what is the outlook for the silicon content per box in mobile phones for the next few years..

Yes, correct..

We expect the silicon content for the higher smartphone will continue to grow and for the mid-end to low-end will maintain at a current level..

Do you have a follow-up second question, Patrick?.

Do you expect the seasonality for the next few years to be similar with this year, that is weaker second quarter and stronger second half?.

So, Patrick, your question is you want to know that in the next few years do we expect the seasonality pattern to be similar to this year, which is a weaker second quarter and a stronger second half?.

Yes. Thank you..

We don't know. Each year seems to have their own characteristics. It has to do with the year-end inventory, it has to do with the product launches and just many factors. So I cannot forecast to be the same..

The next question, Operator, also from the line, a follow-up question I believe..

Yes, from Mehdi Hosseini of SIG..

When you talk about cryptocurrency, what are some of the applications that are driving your loading? Is that specifically GPU or are there other applications? And if you could help me better understand, it will be great..

Mehdi's question is that in regards to cryptocurrency he wants to know what are some of the applications specifically driving the strong demand, is it GPU, what is it specifically..

The customer in the cryptocurrency mining really design their own chip, so we characterize that as a ASIC processor unit. So those are very different. It's a very high power, very, very high speed. So the design is totally customized..

Does that answer your question, Mehdi?.

Would you actually break this out if it becomes significant in the future, like each category or other --.

Mehdi's question is that will we break out like the ASIC segment specifically if it becomes significantly bigger..

-- in cryptocurrency?.

Crypto -- ASIC..

Crypto, ASIC. We'll see. Currently, the volume is not big enough to put a separate characterization. But there are many innovators in this field. People used to use GPUs. Also people use standard CPU also and FPGA also. So it is the combination of all the products that we are producing today..

In the interest of time, we'll probably take 2 last questions, one from the line please, Operator, first and then we'll take one from the floor. So, Operator, please --.

We have a follow-up question from Steven Pelayo of HSBC..

Just one question for Lora. Congratulations on the good free cash flow in the third quarter. I want to think about it a little bit going into the next year. It looks like this year you guys are going to generate maybe $40 million, $50 million more in free cash flow relative to the dividends you pay. So you're still growing your cash balance.

And if next year you have kind of flattish CapEx and revenues growing 5%, 10%, it looks like you're going to probably generate even more free cash flow.

Can you talk a little bit about what's the optimal cash balance and what your thoughts are on maybe dividends going forward?.

You're right. And we have been able to grow our free cash flow faster than before, since 2014. So therefore, we were able to increase our dividend payout starting from 2015 from $3 to $4.5 to $6 and to $7 this year.

So with the CapEx intensity and the EBITDA margin we were talking about, we are very confident about our ability to continue to generate free cash flow in the next few years. Therefore, we plan to gradually increase the cash dividend payout going forward..

All right, a final question, Citi Group, Roland Shu..

I think the first question is -- you're talking about the new fab construction. I know in Taiwan your 12-inch fab is based on this Giga-fab design and now you are building the 12-inch fab in Nanjing.

So is Nanjing also based on this Giga-fab design?.

We build the Nanjing fab to expand or to increase our opportunity in Mainland China so we can serve the customer more closely. Whether there will be a Giga-fab in our plan, but right now the first phase is 20,000 wafers commence in 16-nanometer..

So do you have the plan to kick off this second phase construction?.

We are not ready to answer this question yet..

Then, if I may, last question is for your 16-nanometer, can we have a ballpark number of how much revenue is coming from 12-nanometer? And I think the same question as the 22-nanometer, how much revenue is coming from 22?.

Well, the 12-nanometer will be in next year, so I cannot give you an estimated number. The same as the 22-nanometer. But customer right now is -- design for their product and to be early introduced in the 2018. So probably at that time we can give you a more clearer picture for that..

Okay, thank you, everyone. This concludes our Q&A session. Before we conclude today's conference, please be advised that the replay of the conference will be accessible within three hours from now and the transcript will become available 24 hours from now, both of which will be available through TSMC's website at www.tsmc.com.

So thank you for joining us today. We hope you will join us again next quarter. Goodbye and have a good day. Thank you..