Hello, everyone, and welcome to Atomera’s Second Quarter Fiscal Year 2023 Update Call. I’d like to remind everyone that this call and webinar are being recorded, and a replay will be available on Atomera’s IR website for one year. I’m Mike Bishop with the Company’s Investor Relations.

As in prior quarters, we are using Zoom, and we’ll follow a similar format with participants in a listen-only mode. We will open the call with prepared remarks from Scott Bibaud, Atomera’s President and CEO; and Frank Laurencio, Atomera’s CFO. Then we will open the call to questions.

If you are joining by telephone, you may follow a slide presentation to accompany our remarks on the Events & Presentations section of our Investor Relations page on our website. Before we begin, I would like to remind everyone that during today’s call, we will make forward-looking statements.

These forward-looking statements, whether in prepared remarks or during the Q&A session, are subject to inherent risks and uncertainties.

These risks and uncertainties are detailed in the Risk Factors section of our filings with the Securities and Exchange Commission, specifically in the company’s annual report on Form 10-K filed with the SEC on February 15th, 2023.

Except as otherwise required by Federal Securities laws, Atomera disclaims any obligation to update or make revisions to such forward-looking statements contained herein or elsewhere to reflect changes in expectations with regard to those events, conditions, and circumstances.

Also, please note that during this call, we will be discussing non-GAAP financial measures as defined by SEC Regulation G. Reconciliations of these non-GAAP financial measures to the most directly comparable GAAP measures are included in today’s press release, which is posted on our website.

Now, I would like to turn the call over to our President and CEO, Scott Bibaud. Go ahead, Scott..

Thanks Mike. Good afternoon everyone. Welcome to Atomera's second quarter 2023 update call. We had a great quarter, continuing to build strong relationships with our customers performing wafer runs for those in Phase 3, executing on compelling new R&D, and building momentum with newer customers. I look forward to telling you about the developments.

Capitalizing on the momentum generated by our first commercial license deal in Q2 with STMicro, we've been busy meeting with new and existing customers to emphasize the urgency of adopting and taking MST to production.

We've made good progress, both of those semiconductor companies already in our engagement pipeline and generating interest from new customers. Efforts continue with our first JDA partner, and this quarter, we've been collaborating with them on the demonstration and testing of MST solutions for their particularly challenging applications.

A lot of back and forth regarding those experiments has been taking place. We continue to engage with the central engineering unit for the purpose of bringing much-needed solutions to their business units with whom we are also speaking. We believe these steps bring us closer to signing a license with a BEU for a production project.

Likewise, we continue to work with our second JDA customer on efforts focused around optimizing performance in their application, so we can initiate the milestone payments and associated licenses defined in the JDA agreement.

Meetings with the JDA customer and our other licensees about the specifics of MST integration in their devices, our TCAD analysis, planning and executing wafer runs and implementation of the results have been happening with regularity and continue even today. A quick update on STMicro.

We described the steps remaining for commercialization in detail last quarter. Shortly after ST signed a license agreement, work began using MSTcad CAD to create a new optimized design flow, integrating MST into ST's devices.

As described before, ST and Atomera are cooperating closely to achieve the greatest possible performance and cost improvements using MST with the primary design responsibility for this effort being ST with Atomera in a supporting role.

The first revenue milestone under the contract will be triggered when ST installs our technology on an epi deposition tool in one of their fabs. The TCAD work that's already commenced will run in parallel with ST's manufacturing of MST wafers. The installation process is largely dependent on our epi tool vendor.

Due to logistics delays on the tool modification, we are currently expecting this to happen early in the fourth quarter. Once installation is complete and ST has successfully dialed in the tool they'll be ready to build MST wafers.

When ST has completed their work, they will start wafer level qualification to create a high-volume, high-yield manufacturing process which will trigger another milestone payment and grant them the right to manufacture and sell products incorporating Atomera's technology.

At that point, ST will enter volume production and we can expect to start seeing royalty payments. Our announcement of the license agreement with ST has definitely made waves in the industry.

We've had excellent meetings with a number of potential customers who design and build analog and power products and who are interested in working with us on MST. Some have already begun the process by commencing TCAD work with us, and we hope to add several new customers on this front in the near future.

Work on RF-SOI continues to show very good promise in cellular handsets. Because of the large and expanding number of cellular frequency bands available in the world, the RF front end on mobile phones is becoming an increasingly complex and expensive piece of technology, which leverages advantages that specialized RF-SOI substrates can provide.

But those substrates also have some serious drawbacks related to open movement under the buried oxide layer. MST can help to solve those problems by enabling lower cost and less complex front ends which should provide an excellent market for Atomera's technology.

We are working with a number of customers on this today and expect to work with more in the near future. I want to spend a little bit of time talking about how MST can provide a real benefit to smaller lithography nodes.

One of the biggest challenges in semiconductors is to keep lowering power consumption as the nodes get smaller, a phenomenon that prevents them from doing so is something called random dopant fluctuation or RDF, which are variations in concentration of the implanted dopants, and the impact of those variations becomes more significant as the nodes get size get smaller.

It's the demon that few people understand, increasing the cost and power consumption of advanced logic, DRAMs and most other semiconductor devices. The good news is that MST is very adept at mitigating the problem of RDF. One of the most effective ways to improve power consumption is to lower the minimum voltage of transistors in each node.

To do so, you have to be able to manufacture each transistor with as little variation as possible. The more variation in your manufacturing process the bigger the transistors you must design and the harder it is to scale down your voltage. And one of the big drivers of variation is RDF. So to successfully scale to lower voltages RDF must be controlled.

Our analysis shows that in the latest gate all-around transistors, a single dopant atom diffusing into the channel can significantly alter the transistors characteristics. This is why the dopant control characteristics of MST are so important for advanced node customers.

A big focus of our R&D activities today is around proving this capability in the 2 to 4 nanometer range. In DRAMs, one of the most challenging limits on scaling is in the manufacturing margin of the critical circuits responsible for reading the memory bit, which are called sense amps and typically make up 10% to 12% of the DRAM chip area.

Since DRAM capacitors leak, the margin on these sense amps define how long the capacitor can leak before becoming unreadable, so this establishes the refresh interval and resulting power consumption. By improving the variability of DRAM sense amps, MST can help manufacturers make them smaller and use less power.

In this chart, we show a 50% improvement of variability between match transistors that use MST. Another way of looking at this is that an MST transistor can be a quarter of the size of a normal transistor at the same Sigma VT. Again, MST's ability to control random dopant fluctuation is what drives this very significant improvement in variability.

The growth of AI has led to applications that are dramatically more memory intensive. So these type of power consumption improvements for DRAMs are particularly important, which is why we're starting to see very strong interest from players within the memory segment for using MST.

Atomera's world-class team of engineers and scientists continues to find ways of leveraging MST to advance the state-of-the-art in semiconductors. Recently, the IEEE Spectrum featured a segment on Atomera's Founder and his efforts early in his career to bring another key material advance to market, the Erbium Doped Fiber Amplifier.

That invention went on to become one of the foundational technologies enabling the Internet age. His technical leadership continues to drive our team to achieve a similarly groundbreaking result for today's semiconductor industry. There's no doubt that Atomera is seeing wider interest across more applications than ever before.

With our recent announcement of the ST licensing deal, we are seeing tangible proof that customers are standing up and taking notice, and we believe this will accelerate our time to revenue with more licensees.

Although it has been difficult for us to provide much public insight into specific opportunities, I can tell you that the team is busier than ever. Our travel spending has doubled this year, and that is because we see promising opportunities with new and existing customers around every corner, and we're enthusiastic about closing them.

With that, I'll ask Frank to now review our financials.

Thank you, Scott. At the close of the market today, we issued a press release announcing our results for the second quarter of 2023. This slide shows our summary financials.

Our GAAP net loss for the three months ended June 30, 2023, was $5.2 million or $0.21 per share compared to a net loss of $4.5 million or $0.20 per share in the second quarter of 2022. In Q1 of 2023, our GAAP net loss was $5 million or $0.21 per share.

GAAP operating expenses were $5.4 million in Q2 of 2023, which was an increase of approximately $913,000 from $4.4 million of OpEx in Q2 2022.

The biggest driver of the year-on-year increase was a $759,000 increase in R&D expenses, $423,000 of which was due to higher spending with our contract foundry, TSI Semiconductors, where we processed a substantially higher number of wafer lots than in recent years and we absorbed price increases for wafers and engineering services.

The other main factor was payroll costs. which increased by $209,000 in Q2 2023, compared to the second quarter of last year, reflecting new hires that came on board last July. General and administrative expenses increased by $108,000, and sales and marketing increased by less than $50,000.

Sequentially, our GAAP operating expenses increased by $192,000 from $5.2 million in Q1 of 2023 to $5.4 million in Q2, primarily due to $156,000 increase in R&D expenses also, due to higher spending at TSI. Non-GAAP net loss in Q2 2023 was $4.3 million versus $3.6 million in Q2 of 2022 and $4.2 million in Q1 2023.

The differences between GAAP and non-GAAP operating expenses in all the periods we've presented, are almost entirely due to non-cash stock compensation expenses, which were $1 million in Q2 of 2023, $927,000 in Q1 and $859,000 in Q2 of 2022.

Our balance of cash, cash equivalents and short-term investments on June 30th, 2023, was $23.8 million, compared to $17.1 million on March 31, 2023.

During Q2, we used $3.9 million of cash and operating activities, and we've raised $10.8 million of net proceeds from sales of approximately 1.4 million shares under our ATM facility at an average price of $8.15 per share. This compares to a very limited ATM activity in Q1. So we feel we are carefully balancing liquidity and dilution.

As of June 30th, 2023, we had 25.8 million shares outstanding. Moving to our guidance, we still expect non-GAAP operating expenses for 2023 will be in the range of $16.25 million to $16.75 million. But likely, we'll be near the top end of that range, mainly due to higher spending with TSI.

In April of this year, TSI increased its prices, while at the same time, their cycle times got substantially faster. We benefited from this through more cycles of learning, but the price increase and faster wafer processing combined to increase our R&D expenses.

Also, our travel to customers has snapped back to above pre-COVID levels, such that we expect nearly as much on travel in the first half of the year as we did in all of 2022. This is a welcome development, because we're responding to greater customer interest, which should lead to additional licenses and faster commercialization.

As Scott mentioned, we expect that ST will install MST in their tool in early Q4, which will trigger the first revenue milestone at that time. ST's commercial license is already influencing other major players to move more quickly to evaluate and install MST.

Each commercial license involves, upfront license fees with a list price over $3 million and results in recurring royalty revenue when the customer goes to production.

So while our lack of revenue during the first half of the year is disappointing, in the big picture, we're confident that our investments in headcount, wafer processing and sales activities are building the foundation for a profitable recurring revenue business. We do not give revenue guidance beyond the current quarter.

So for Q3, we're guiding to zero revenue, though we may see some early recurring revenue from MSTcad licenses during this quarter. With that, I'll turn the call back over to Scott for a few summary remarks before we open up the call to questions.

Scott?.

Thanks, Frank. Once again, this quarter, the Atomera team has built strong relationships by working closely with customers to develop a deeper commitment to MST.

We believe our large number of engagements are deep material and semiconductor expertise and the solutions MST provides to some of the industry's hardest problems will ultimately be rewarding to shareholders. I hope to share more successes on Atomera's part and announced more licenses and deals in the months ahead. Mike, we will now take questions..

Okay. Thank you, Scott. If you wish to ask a question, please click the Q&A button at the bottom of the Zoom window then feel free to type in your question. I will do my best to aggregate the incoming queries and relay them to management. Alternatively, you can click the Raise Hand button and we may call on you to ask your question live.

And right now our first question comes from Richard Shannon of Craig Hallum. Richard, if you would kindly unmute and you may begin..

Great. Thanks, Mike. And Scott and Frank, thanks for taking my questions. I think the first one for Scott here just to start on STMicro. I appreciate the detail on the progress here and I'm sure you're a little disappointed in the timing here of the tool progress here.

I guess, my first question is, is there something very specific to STMicro, is there an industry-wide issue? And what's your confidence in that being done by early fourth quarter?.

Yeah, quick answer is, it is an industry-wide problem; it’s related to logistics issues that started in COVID and continue through today. And even in March, they've been working to pull this in. So there's some chance that they'd be able to pull it in, but that's really not in their hands.

It's their vendor and they're trying very hard to get it accelerated. I think there's a chance it could happen in late Q3, but right now, our expectation is to be at the very beginning of Q4. And there's some chance that could move, but my belief is that all the urgency is there to get it done now.

One thing I would like to point out though is, and we talked about this in the MSTcad. We're doing a lot of work with them today. So we're doing the development work that's necessary to happen in parallel with the wafers getting up and running.

So even though the installation has been delayed a bit, I'm not sure it has an impact on the overall schedule yet..

Okay. All right. That's fair enough to answer my follow-on there. My only other question related to STMicro, and I asked you this last quarter, obviously, with just hours or days after really engaging on this -- on your license with them.

But maybe you got a sense of what the TAM for their smart power products looks like? I may be able to find any good answer to that in the last quarter.

I'm wondering if you've got any more detail that help us frame that a little bit better?.

I don't think we have anything new from what we provided in the last quarter, which is that the smart power resides in there, analog sensor and MEMS group, which was about $1.1 billion and therefore, about one-quarter of the total revenue for STMicro. But beyond that, we don't have any -- we can't really provide any more granularity on the TAM..

Okay. Fair enough. And Scott, let me jump to a topic here of advanced nodes, and I appreciate all the detail here and in the past few calls here, it sounds like activity is picking up here. I made a specific comment about doing work on nodes between 2 nanometers and 4 nanometers.

Obviously, 3 and 2 are ones upcoming, but there's one foundry out there that has what they call a 4-nanometer node. I'm not sure it's actually 4, but maybe 5. But if you were intersecting with 4-nanometer seemingly could happen fairly soon.

I guess, I wanted to -- I didn't want to talk you up and maybe even want to be talked down here about expecting kind of the progress there and the potential time frame for intersection with advanced nodes. But a 4-nanometer node may come up in the not-too-distant future.

So I want to get your sense of whether that gives a possibility or not?.

Yes. So Richard, first, let me make a clarification. We're working on MST film implementations that would be at the range -- the total size of 2 nanometers to 4 nanometers. Of course, anybody who's working on those very small nodes would want to be working with an MST film that was very, very thin like that.

So I -- my reference was not to a specific node like a 4-nanometer node or a 2-nanometer node, but it's implementations that would be small enough to be appropriate in that kind of range of nodes.

So obviously, we haven't made any kind of guidance about thus being adopted by either an existing FinFET node or an upcoming Gate-All-Around node, but that's something that we're working very hard to achieve..

Okay. Fair enough. Thanks for that clarification. Glad I asked that question. Want that thing to proliferate beyond the call. So thanks for that. One or two more questions, I guess, but I think both for Scott here. In the last few calls and frankly, for more than just a year or two, you've been talking about the opportunity for RF-SOI.

One of your statements made, I think, is roughly 3, 3.5 years ago. You talked about engaging with customers who had a fairly sizable share of the total market for RF-SOI. This seems like engagement has widened since then.

Would you want to update what that percentage looks like today? I mean, I think, it was a majority even back then -- is it something that….

I think what I said back then was that we were working with the majority of the installed base of RF-SOI device manufacturers. And that's still the case. I talked in this call about expanding that further. We have started working with more since I made that comment, and we continue to work with all the ones we are working with back then.

So yes, continues to expand. As a matter of fact, we're making -- we continue to make really good R&D progress in that area and partner with some important players in the RF-SOI space.

So I'm very hopeful that, that will turn into some licenses and revenue for us in the near future?.

Okay. All right. Fair enough. And maybe just last quick question, I'll jump out of line. Just on DRAM. I know you've talked about this a little bit in the past.

It seems like your comments are a little bit more forceful and certainly well placed not only from an AI dynamic, but just from a -- I think DRAM has been known to be slowing down in many different ways here in the past. It sounds like you have a dramatic effect. Would you characterize the work here with DRAM makers to have accelerated.

Meaningfully in the last six months or so, especially since it looks like a lot of the DRAM makers have plenty of capacity available for testing.

How would you characterize the change in engagement with those guys?.

I definitely would say that's the case, Richard. We have been talking to DRAM manufacturers for years. We've had these variability results that I showed today. This is some new data, but we've had data in the past that showed we had good variability improvements.

But I'm not sure, if it's driven by AI because AI is absolutely driving the DRAM manufacturers to try to figure out how to solve some problems they can see same of demand coming there and they're going to need some solutions on power consumption and other things.

But we certainly have seen an uptick in interest from our technologies in the DRAM space and in the last 6 months. And so we're hopeful that leads to something good..

Well, certainly it would be a big market for that were to happen. So it seems like there'll be a wholesale change if that were adopted even by one, so that would be very interesting to see. So, excellent. Well, I appreciate the time guys. I will jump on the line. Thank you..

Okay. Thanks, Richard...

All right. Our next question comes from Cody Acree, The Benchmark. Cody, go ahead..

Thanks, guys for taking my question. Maybe can you just -- Scott go back to the STMicro implementation, you mentioned some of the delays.

Can you talk more about that -- those delays? And are those something that you expected or those new findings this quarter?.

No. I think when we announced the STD back in May, we said that, they had to convert their tool. There are just some logistics issues having to do with parts that are long lead items and then just getting some people to do the actual work. And at the time, we didn't know what date that was going to be scheduled.

We were hopeful it could be scheduled sooner, but it looks like it's going to be a little bit longer than we hoped. It's not anything to do with our technology or ST's commitment or anything. This is just a case where you need some parts that are in short supply and are not going to be available for a little while..

Yeah, I mean, and I guess little bit of unique those delays, for the most part I guess, can you talk about what you're doing with subsequent engagements to make sure that you're streamlining the process estrogen?.

Yes. I mean this one is a little bit of a unique situation. For the most part, people have Epi tools, and it's a very minor change to switch over to such the tool over to support our technology does not require any kind of major operations, they typically have to change a few different gas spigots that they put into the tool and then they can run MSD.

In this case, it's a little bit of a -- I don't want to explain the details of what it is because it's confidential, but -- it involves an unusual tool set up that is a little bit harder to just modify quickly than what we would normally see. So I don't think it's a systemic problem.

We've had people do to conversions very rapidly within weeks in the past. And in our labs in Phoenix, we can do a tool conversion in a day or two. So this is not a systemic problem.

And can you talk about the single atom dopant impact?.

Yeah,.

That's -- that sounds like more of a newer issue that has come up..

Yes. So our analysis shows a gate all around transistors, which are, as you know, they're going to be adopted by the foundries at very small process nodes, probably in the 3- and 2-nanometer level. Those -- those transistors are highly doped in their source and drain regions.

And the challenge is that with random dopant fluctuation some of those dopant atoms can move out into the channel. But in this case, the channel is so small that 1 or 2 atoms moving into the channel increases the concentration of dopants in that channel significantly and they want the channel to be as clear of dopants as they can possibly make it.

So by implementing MST, which really improves the chances that they won't see random dopants going into the channel we can bring a big improvement in reliability from that perspective and performance..

And Frank, you talked about the engagement commitments that if you're involved with, what is that plan for spending impact to your outlook?.

Yes, like I said, we're not changing sort of the full year guidance to be sort of around the mid-$16 million range, which we gave at the beginning of the year. One of the things that we saw at the beginning of the year was there was a price increase that was imposed by TSI. We're sort of now used to that.

We also had quite a number of lots that we're waiting in the queue because we have been talking about in years past. At times, their cycle times were slow, and then there was also contention with commercial business because of all of the constraints that existed in the supply chain.

So during the first half of the year, we were able to really clear a lot of backlog of running wafers that we have been planning on doing. And we got, I would say, a head start on lots that we're going to be analyzing in the second half of the year. So while I'd say the first part of the year is really front-end loaded in terms of TSI spending.

I didn't change our full year guidance because I think this will -- will not revert back to the levels that they were in 2022 and before that because those were actually, things were moving too slowly. We weren't processing enough wafers, but it's going to be more normalized for the year.

So yes, in terms of what's driving the headcount, some of it is the TSI costs, and we've had -- we added a couple of heads last year, and we still have open positions that are in our budget and are reflected in the full year guidance that we are looking to hire between now and the end of the year..

So if you have the personnel today, what do you think your spending could look like, or what's the optimal level of spending that you're looking for?.

Well, I mean the sort of the full year has us at about $4 million to $4.2 million a quarter. And I think -- it's hard to say whether that's optimal because, obviously, as the business scales, it's certainly likely that we would add additional headcount.

But if you go back about 12 or 18 months, we were mentioning that we were feeling constrained in terms of human resources to do the work that we needed to do to support customers. I'd say we're still a little bit understaffed relative to the work that needs to be done, but it's not as severe as it was in the past.

So I think we'll continue to provide annual guidance and -- the spending will increase, but I don't see anything happening at a step function rate. I think what the TSI price increase does show, though, is we save -- in the big picture, a lot of money by not owning our own sort of mini fab, that's a very prohibitive thing to do.

But we rely on a number of vendors on the outside where we have to continually try to keep them honest because it is -- it does have an impact on us if there are price increases in some of these providers..

And Scott, I guess, you mentioned the signing and the progress of STMicro encouraging others to move forward.

Can you give us any color there as to what that might have spurred? And are you also looking at greater engagement within STMicro expansion of that engagement?.

Yes. So I think we've spoken about this, Cody, before. The guys we work with are incredibly technically sound very, very thorough in their analysis of our technology and make decisions. But in fact, in the end, a lot of them are afraid of being first movers.

So when we can go into a customer and say, hey, here's STMicro very well-respected company and we're going to go to production with them. That seems to immediately like cause a reaction on people's parts like, "Oh, okay, now I really have to get serious.

We've seen this past quarter -- well, of course, when we made the ST [ph] announcement, we proactively reached out to all of our customers who are in the power and analog spaces, and we said, you better start taking this seriously.

And I think that had a very positive effect, and we have started working with some of them, as I said in my commentary, but it also works with other folks like who just want to see that we will be in production and that forces them to think they need to be there as well..

And any expansion of the ST engagement?.

Okay. Not that we can announce yet. ST has a number of different business units where our technology would be interesting outside of the one that we're working on. And obviously, that's something that we'll hope to do with them over time, but we can't announce anything now..

Right. Thank you guys. Appreciate it all..

Okay. It looks like Richard Shannon has a follow-up question..

Yes, Thanks, Mike. Scott, just one quick follow-up for me. Supporting certain areas that you talked about initially like RF-SOI and obviously, power gets a little bit bigger or one thing. But when you talk about leading edge nodes in DRAM, you're talking about really large markets.

How do things have to change from a headcount resource R&D wafer sort of view to make that reality, especially as you get close to that point in time where some sort of contractual license agreement would be signed?.

Yes. If we hit on all of those simultaneous, I do think we'll have to expand headcount a little bit, but I -- but it may impact our R&D budget more than just on a headcount basis.

One of the challenges that we have in the market, especially for the most advanced nodes is that, the potential customers are used to working with the equipment manufacturers like Applied Materials or ASM or Tokyo Electron.

And when they come in and talk about an improvement, they want to see a lot of data, wafers run to actually show the improvement. And they kind of use the same standard with us.

So the good news is we have our own epi tools, and we can do a lot of epi work to prove the technologies that like the chart that I showed on this page earlier was actual silicon tested data, it's not simulation. We do a lot of simulation work, and we do a lot of advanced work that we can on the epi tool with lots of advanced metrology outside.

But it's -- if we continue doing more and more work with these advanced nodes guys, I think we're going to have to start contracting with outside companies to do expensive wafer level type of work that could start to drive up some of our costs. We don't see that -- I mean, we don't have any of that right now in our headlights, Richard.

I mean, for the most part, our customers understand that we can give them so much data. And at some point, they have to take over and start running their own wafers to generate the rest. But to be competitive, I think we will have to take on more of that over time..

Okay..

But I still -- for the most part, I still feel very strongly in this engagement -- this business model that we've established that we will be able to leverage relatively small team and small burn to generate enormous business opportunities, even if it goes up a little..

Right. Okay. Perfect. That was my only follow-up question. That's all for me. Thank you, Scott..

Yes. If I could just continue on that, because I saw a question kind of in the chat and I thought it ties very closely what Richard was just asking. Someone was questioning, what do we run wafers for TSI? We've worked with TSI for over seven years.

And as Scott was saying, it's not always easy to go and build a complete device and test the benefits of MST on it. And TSI gives us a very cost-effective way to do that. And that has the benefit that we've been able to prove out technologies like MSTSP and SPX for kind of power devices and see the impact on the full device and have silicon data.

It also helps us to keep our epi tool calibrated. So we want to run wafers periodically and see how devices run with MST over time. So there's a lot of benefits there in terms of both our own internal R&D work and then trying to simulate in silicon things that customers are doing.

But in the future, as Scott was alluding to, when you get to really advanced geometries that's harder for us to do in-house. And those are areas where in the future, there could be costs.

I alluded to that in the last earnings call that as we have participated in kind of advanced node ecosystems, those can be more expensive places to outsource R&D to test on to..

All right, Frank..

And Frank, just -- so on the Q&A chat, the couple -- there's a number of good questions that have come in. So, let me just -- there's a couple that maybe you can answer relatively quickly. First is the expected quarterly cash burn going forward given the increase in headcount and cost of wafer rents..

Yes. I mean the guidance we give is always non-GAAP operating expense, because that -- because we're not giving forward revenue guidance beyond the current quarter.

But we expect for the year, like I said, 16.25% to 16.75%, which implies $4 million to $4.25 million of operating -- non-GAAP operating expense very close to cash per quarter, and I would stand by that for the second half of the year..

And how much is left on the aftermarket facility?.

Right. When we established the ATM facility, it was a $50 million facility. And we started using it in the middle of 2022. We've done a total of $17.3 million on that. So there's $32.7 million remaining on that after the end of last quarter..

Okay.

And then We got a question here that asks how did the relationship with Arizona State University come about? And if there's any other color there, whether other universities are under consideration, or what's the nature of -- how did that generally how the relationship come about?.

Yeah. Okay. So this started a while ago back in probably 2017, 2018, shortly after we went public, we needed to get access to a 300-millimeter epi tool on a more regular basis. Up to that point, we had leased it -- it's very expensive to lease.

And the problem is that you get it, and it takes a while to get it calibrated and you can use up almost all your lease time just getting it calibrated and ready to run some wafers and then you lose it and you start all over again, if you lease it again.

So we were looking around the world for places to be able to maybe buy a tool and put it in and there's just not that many available. This has to be kind of a world-class clean room and be flexible enough to allow us to lease and install a tool. I want to just say that we work with lots of universities.

We've had a long-term relationship with UC Berkeley with Notre Dame with the University of Pennsylvania with a little bit with Georgia Tech, with University of Texas, Austin with ASU. So we're doing some R&D that puts us in touch with a lot of folks out there in the university space.

So it wasn't necessarily that we were out looking for universities, but we did as you know, we have in epi installation 200-millimeter in Arizona, and we heard about this other facility that ASU had, and so we approached them about actually about using their facility there.

And over time, that worked out to the point where we were able to actually lease an epi tool in that facility, which is excellent for us. It's -- it's got two chambers. It's got a 300-millimeter chamber and a 200-millimeter chamber.

And so we can run both wafers simultaneously in there, and it allows us to do some of the very advanced work that I talked about for like the 2-nanometer to 4-nanometer work that I was speaking about. At ASU, we have developed a good relationship with the university. We're doing research work with them as well.

And for the most part, the partnerships that we have working at ASU are our customers that we bring in to work with us, some things there. But overall, I think it's a positive relationship..

All right. Thanks. And outside of ST and the JDAs, looking at the engagement pipeline that we publish, the comment here is that there's not been any movement in the pipeline. And so can you kind of provide a little bit more detail as to potentially moving customers along the pipeline and the level of activity there..

Yeah. I share your frustration with that. I think in the COVID timeframe, we saw a slowdown in -- I mean, we had a lot of activities going on, but we didn't see a lot of people moving through the phases. We're really getting much more active with customers and with new customers, and I think that we'll start to see growth in the pipeline.

I will say that in Phase 1, Phase 1 is more like the beginning of the funnel. For someone to enter into Phase 1 they have to have signed an NDA with us, which, in some cases, can be a really big hurdle. And they have to be actively planning on doing a wafer run with us.

And so sometimes, we rotate people out of Phase 1 because we had lots of discussions with them and then it became less active. But we always have tried to upgrade the quality of the people that we have in there. So I think we'll start to see that grow more in the near future.

Of course, my bigger -- our bigger focus is trying to get people in the later stages to move further along into Stage 4 and hopefully into Stage 5. And so we'll keep really focusing on trying to make that happen more than just growing the numbers in the pipe..

And of course, there's more request for detail on the JDA relationships. And so I just wanted to see if there was any additional commentary you can make about JDA 1 and moving toward their business units..

Yeah, I saw this question about JDA 1 was about discussions with Central Engineering group versus the Business units, I want to emphasize, we speak with both, right? We talk with the guys in the business unit to understand what their challenges are, with their process nodes, what they're trying to achieve in the market.

And a lot of times, they will give us some guidance on what they need to do work on. We go off, we do simulations and we do some experiments.

Well, usually, we do simulations and we come back and share that with them and then they say, okay, work with the central engineering group, do some experiments, you guys work together on the experiments and then we'll look at the results and see what the next steps are. And so that has really been happening continuously.

It's a dialogue between us and the central engineering group and the business units. And I would say in terms of roles, the business units are the ones that are saying what they really need and the central engineering groups are kind of administering the relationship of setting up experiments and testing or reviewing the results with us.

But I know it's frustrating that you guys can't see the results, and I feel like people say nothing has happened in the last few years with that JV. But in fact, we have been working on continuously with these guys and lots of new tests and experiments. And I guess the way that we can we can most judge that.

It will be bad if we stop being asked to do experiments. And as long as they continue to ask, then we're always chasing something that we hope we'll be able to achieve somebody soon..

Okay. And one final question here before we adjourn. There was a -- we announced a license with a foundry partner a while back and last update was that they were waiting for the second run data. Wondering if you could provide an update with that..

Yeah. We don't have that data yet. And I don't think I'm in a position to really give schedules on that, but I can tell you that we have looked at the results of the first run and have been working with them on defining a next run and then have got a really compelling plan that we hope to see some results on soon..

Okay. And I think that wraps up the questions here. So I'll turn back to you, Scott, for closing comments..

All right. Thanks, Mike. I want to thank everyone for attending today's presentation. I'm happy we're able to share with you some of our recent progress and our potential in some new technology areas.

Please continue to look for news, articles and blog posts to keep you up-to-date on our progress, which are available along with investor alerts on our website, atomera.com. We are planning to attend a number of investor conferences in the coming months. So please look out for those announcements as well.

Should you have any additional questions, please contact Mike Bishop, who’ll be happy to follow up. And thanks again for your support and we look forward to our next update call..

Thank you. This concludes the Atomera webinar.