Thank you, Lee-Lean. I want to provide some additional context on why we are so confident in the market potential for our APU architecture, especially for inference workloads. First, the unmatched flexibility of our variable bit processing is key. With 2 million undefined bit processors that can be toggled from 1 bit to 2 million bits cycle by cycle, our APU can adapt to real time -- I'm sorry, in real time to maximize efficiency. This dynamic bit-wise configurability can process long strips 1 bit at a time and is ideal for inference since research shows that different bit precisions are more efficient for different models. Second, our APU architecture breaks the Von Neumann model by removing the data fetch function. This innovative design delivers higher performance with lower power consumption. As Lee-Lean mentioned, these capabilities directly address the critical needs of data centers and emerging applications by lowering data center power consumption and reducing inference costs for GenAI end users. Importantly, I want to emphasize that our APU represents true in-memory -- I'm sorry, true compute-in-memory architecture. Unlike competing chips that claim compute-in-memory, they are actually near memory compute, and our APU has logic physically integrated in the memory. This fundamental difference in architecture will ultimately enable our APU to achieve the transformative speed and efficiency gains we anticipate as we scale. Our true compute-in-memory architecture gives us a sustained competitive advantage. To accelerate ecosystem development, we are focusing on getting APU in the hands of key partners in the military, hyperscalers and academia. The real-world deployment and libraries will showcase the benefits, expand use cases, and support our go-to-market capabilities. One example of the strategy is helping us promote and monetize Gemini-I is a recently published research paper from Cornell University. We are pleased to announce that the Cornell paper demonstrates our APU one -- I'm sorry, Gemini-I APU's unique performance benefits for genomic applications. Leveraging the APU's massively parallel in-memory architecture, Cornell researchers showed up to 6 times faster DNA sequencing filtering compared to a 16-core CPU. This showcases our technology's advantage for data-intensive workloads requiring rapid, low-precision comparisons. The study also revealed strong potential to accelerate other applications with similar data-matching needs, including medical data analysis, search, security, and more. With simple scaling, our APU can be packed into cost-effective high-density servers to multiply this performance for real-world deployments that can lower power budgets for hyperscalers compared to GPU solutions. These results enforce -- I'm sorry reinforce our significant market opportunities across sectors that rely on efficiently finding patterns and similarities within massive data sets. We remain focused on delivering the game-changing in-memory compute performance to customers across multiple industries. As Lee-Lean mentioned, we anticipate receiving first silicon devices of Gemini-II in February. After initial evaluation and debugging, we will target a second spin this summer and initiate benchmarking shortly after. Our $2.3 million in SBIR funding will support this development. As a reminder, this includes our recently announced second SBIR Direct-to-Phase II $1.1 million contract to create specialized algorithms for the U.S. Air Force Research Laboratory. The target applications include in-craft applications such as search and rescue, object detection, moving target indication, change detection, and SSIM in GPS-absent situations. GSI will also develop algorithms using data from the U.S. Space Force to showcase the performance benefits of its compute-in-memory APU2 integrated circuit. In summary, the versatility of architecture, hands-on customer engagements, and ecosystem partnerships gives us confidence in our market opportunity. We have a robust product roadmap to deliver continuous innovations that we can -- that we believe will capitalize APU adoption across multiple industries in the coming years. Let me switch now to customer and product breakdown for the third quarter. In the third quarter of fiscal 2024, sales to Nokia were $807,000 or 15.2% of net revenues compared to $1.3 million or 20% of net revenues in the same period a year ago, and $1.2 million or 20.3% of revenues in the prior quarter. Military/defense sales were 28.2% of third quarter shipments compared to 26.2% of shipments in the comparable period a year ago, and 34.8% of shipments in the prior quarter. SigmaQuad sales were 46.9% of third quarter shipments compared to 45.2% in the third quarter of fiscal 2023, and 55.8% in the prior quarter. On one last note on product sales in the third quarter, we shipped over $600,000 of a prototype radiation-hardened SRAM to two different customers. These will be deployed in two separate satellite programs. I'd like to hand the call over to Doug. Doug, go ahead, please.